The present invention is related to data communication signal handling apparatuses. In particular, the preferred embodiment of the present invention is manifested in a non-delaying input circuit arrangement for a high speed data communication signal repeater apparatus. The input circuit is configured to receive information-conveying communication signals encoded according to at least one predetermined signal format, and to repeat the encoded information in an output signal encoded according to a desired format at an output locus. Preferably the desired format is one of the at least one predetermined formats. The apparatus is configured to present sufficiently low resistance-capacitance combination between its input loci and its output loci to impart substantially zero time delay to communication signals that are handled.
In today's data transmission systems there are several high speed, low voltage transmission standards, or formats, that may be employed for conveying signals. Standards are agreed upon protocols or formats that are established to provide uniformity in dealing with common situations. In the case of data communications, for example, establishing standards for handling data signals assures that equipment built by various manufacturers will be capable of implementing the agreed upon standard and assures that the various equipment will work compatibly with each other.
Market forces urge manufacturers toward producing smaller, less complex apparatuses so that products using those apparatuses may be more compact and more reliable. Further, if an apparatus can handle more than one standard, for example, with little or no additional change or rework required, there is a beneficial reduced complexity of stocking and resupply of spare or replacement parts for products that use such a multicapable apparatus.
Data transmission systems require repeater apparatuses at intervals within their distribution networks. Repeaters receive data signals, assure their integrity in terms of timing, periodicity, amplitude and other parameters, and then forward the “reworked” signal onward within the network to a destination or to another repeater. Currently many data transmission systems are beginning to move away from the older Emitter Controlled Logic (ECL) and Positive Emitter Controlled Logic (PECL) standards or formats toward wider employment of more rigorous standards, such as Low Voltage Differential Signaling (LVDS) and Low Voltage Positive Emitter Controlled Logic (LVPECL). In many data transmission systems there is a need for a repeater that is capable of handling high speed differential signaling configured and transmitted according to either the LVDS format or the LVPECL format.
It is desirable that the common mode range of a differential signal be as wide a signal range as possible in order to allow for longer data transmission lengths and greater ground offsets between a driver and a receiver. Such a design provides increased reliability and signal integrity. Generally, a rail to rail input common mode level is desired. Further additional requirements include low input leakage to conform to data transmission standards such as LVDS, and high sensitivity to small differential input signals while operating at high speeds.
Prior art data signaling repeaters are available that meet one or some of such design needs, but no prior art designs fulfill all of these design needs.
There is a need for an apparatus for handling high speed data communication signals that has a rail to rail common mode input range, high input sensitivity, low input leakage and high speed operation. The present invention provides such a data signal handling apparatus that fulfills the above needs principally by establishing a simple construction that presents sufficiently low resistance-capacitance combination to impart substantially zero time delay to the communication signals being handled.